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Silicon Labs /EFR32MG24A010F1024IM48 /DCDC_S /IEN

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Interpret as IEN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BYPSW)BYPSW 0 (WARM)WARM 0 (RUNNING)RUNNING 0 (VREGINLOW)VREGINLOW 0 (VREGINHIGH)VREGINHIGH 0 (REGULATION)REGULATION 0 (TMAX)TMAX 0 (EM4ERR)EM4ERR 0 (PFMXMODE)PFMXMODE

Description

Interrupt Enable

Fields

BYPSW

Bypass Switch Enabled Interrupt Enable
WARM

DCDC Warmup Time Done Interrupt Enable
RUNNING

DCDC Running Interrupt Enable
VREGINLOW

VREGIN below threshold Interrupt Enable
VREGINHIGH

VREGIN above threshold Interrupt Enable
REGULATION

DCDC in Regulation Interrupt Enable
TMAX

Ton_max Timeout Interrupt Enable
EM4ERR

EM4 Entry Req Interrupt Enable
PFMXMODE

PFMX Mode Interrupt Enable

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data